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Design-for-test approach of an asynchronous network-on-chip architecture and its associated test pattern generation and application.
Xuan-Tu Tran
Yvain Thonnart
Jean Durupt
Vincent Beroulle
Chantal Robach
Published in:
IET Comput. Digit. Tech. (2009)
Keyphrases
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network on chip
packet switched
design process
hardware design
web services
design patterns