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A Tool for Trading-Off On-Line Error Detection Efficiency with Implementation Cost for Sequential Logic Implemented in FPGAs.
Grzegorz Borowik
Andrzej Krasniewski
Published in:
ICSEng (2011)
Keyphrases
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error detection
error correction
cost reduction
error recovery
reconfigurable hardware
data cleansing
hardware implementation
efficient implementation
cost savings
error correcting
artificial intelligence
fault tolerance
modal logic
fault isolation
micron cmos
hardware software
low cost