Low memory usage architecture for 3D graphics based on scan-line rendering.

Yasushi Sugama Toshiyuki Yoshitake Heng Guo

Published in: ICCE (2015)

Keyphrases

memory usage
scan line
array processor
real time
memory requirements
biologically motivated
memory footprint
dynamic programming
coarse to fine
multiresolution
object detection
image quality
camera calibration
selection mechanism
linear array