Capacitance Mismatch Evaluation for Low-power Pipeline ADC Design.
Tomohiko ItoTakafumi YamajiDaisuke KuroseTetsuro ItakuraPublished in: IEICE Electron. Express (2004)
Keyphrases
- low power
- single chip
- high speed
- power consumption
- low cost
- vlsi architecture
- low power consumption
- logic circuits
- power dissipation
- gate array
- cmos technology
- digital signal processing
- high power
- power reduction
- mixed signal
- vlsi circuits
- efficient implementation
- high frequency
- wireless transmission
- ultra low power
- long range
- embedded systems
- cmos image sensor
- nm technology
- infrared