Hardware architecture for matrix factorization in mimo receivers.
Barbara CeratoGuido MaseraPeter NilssonPublished in: ACM Great Lakes Symposium on VLSI (2007)
Keyphrases
- matrix factorization
- hardware architecture
- collaborative filtering
- hardware implementation
- recommender systems
- hardware architectures
- low rank
- factorization methods
- data sparsity
- negative matrix factorization
- missing data
- multiple input multiple output
- nonnegative matrix factorization
- wireless communication
- stochastic gradient descent
- factor analysis
- field programmable gate array
- implicit feedback
- associative memory
- personalized ranking
- probabilistic matrix factorization
- tensor factorization
- pattern recognition
- latent factor models
- signal processing
- feature selection
- neural network