Reconfigurable lattice mesh designs for programmable photonic processors and universal couplers.
Daniel PérezIvana GasullaJosé CapmanyRichard A. SorefPublished in: ICTON (2016)
Keyphrases
- general purpose processors
- low cost
- signal processor
- hardware implementation
- general purpose
- processor array
- interconnection networks
- parallel algorithm
- signal processing
- low power
- d mesh
- field programmable gate array
- parallel processing
- single chip
- systolic array
- multiprocessor systems
- physical characteristics
- reconfigurable architecture
- parallel architecture
- parallel computation
- embedded processors
- fine grain
- lattice structure
- digital signal processors
- heterogeneous computing
- floating gate
- real time
- boolean algebra
- parallel computing
- shared memory
- high curvature
- mesh generation
- volumetric data
- single processor
- hardware architecture
- high end
- design space
- design principles
- medical images