A low-power scan-path architecture.
Mohammad AlisafaeeSafar HatamiEhsan AtoofianZainalabedin NavabiAli Afzali-KushaPublished in: ISCAS (5) (2005)
Keyphrases
- low power
- vlsi architecture
- scan path
- power consumption
- high speed
- low cost
- mixed signal
- cmos technology
- vlsi circuits
- single chip
- nm technology
- signal processor
- real time
- logic circuits
- digital signal processing
- low power consumption
- eye tracking
- eye movements
- image sensor
- power dissipation
- vlsi implementation
- hardware implementation
- cmos image sensor
- ultra low power