Efficient hardware implementation of a CRYPTO-MEMORY based on AES algorithm and SRAM architecture.
Anna LabbéAnnie PérezJean-Michel PortalPublished in: ISCAS (2) (2004)
Keyphrases
- hardware implementation
- software implementation
- hardware architecture
- pipeline architecture
- efficient implementation
- fpga implementation
- signal processing
- parallel architecture
- pipelined architecture
- dedicated hardware
- fpga technology
- memory management
- image processing algorithms
- image binarization
- advanced encryption standard
- fractal encoding
- field programmable gate array
- data streams
- feature selection