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Interconnection Allocation Between Functional Units and Registers in High-Level Synthesis.
Cong Hao
Jianmo Ni
Nan Wang
Takeshi Yoshimura
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2017)
Keyphrases
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high level synthesis
functional units
parallel architecture
processing elements
machine learning
parallel processing
hardware implementation
finite state machines
design space exploration
computer vision
np hard
data management