High performance decoding aware FPGA bit-stream compression using RG codes.
J. Satheesh KumarG. Saravana KumarA. AhilanPublished in: Clust. Comput. (2019)
Keyphrases
- bitstream
- compression algorithm
- pixel domain
- decoding algorithm
- bit plane coding
- error control
- coding scheme
- bit rate
- compression ratio
- error resilient
- error resilience
- image transmission
- arithmetic coding
- video signals
- compression scheme
- video quality
- compressed images
- progressive transmission
- video transmission
- low power consumption
- error correction
- bit errors
- variable length
- compressed domain
- compression efficiency
- turbo codes
- high speed
- compressed video
- bit plane
- scalable video coding
- scalable video
- rate allocation
- low bit rate
- error detection
- error concealment
- image compression
- wavelet coefficients
- macroblock
- image coding algorithm
- frame rate
- video coding
- multiscale
- motion vectors
- end to end
- multiple description coding
- subband
- inter frame
- video sequences
- video conferencing
- bit planes
- image segmentation