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A 60-GHz CMOS Receiver Front-End With Frequency Synthesizer.
Toshiya Mitomo
Ryuichi Fujimoto
Naoko Ono
Ryoichi Tachibana
Hiroaki Hoshino
Yoshiaki Yoshihara
Yukako Tsutsumi
Ichiro Seto
Published in:
IEEE J. Solid State Circuits (2008)
Keyphrases
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high speed
power consumption
dielectric constant
back end
clock frequency
low power
low cost
intersymbol interference
neural network
circuit design
power supply
single chip
fading channels
cmos technology
simulation software
low frequency
analog vlsi
computer simulation
intel xeon