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Characterization technique to implement self-timed cells for VLSI design blocks.

Susana Ortega-CisnerosJuan José Raygoza-PanduroJosé Roberto Reyes BarónDaniel Tonali Aranda BretónAntonio Casillas Zamora
Published in: CCE (2014)
Keyphrases
  • vlsi design
  • design methodology
  • low power
  • block size
  • databases
  • artificial intelligence
  • decision making
  • expert systems
  • high speed
  • building blocks
  • high bandwidth