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A custom processor for an FPGA-based platform for automatic license plate recognition.
Guilherme A. M. Sborz
Guilherme A. Pohl
Felipe Viel
Cesar A. Zeferino
Published in:
SBCCI (2019)
Keyphrases
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license plate recognition
application specific
real time
hardware implementation
high speed
parallel architecture
domain specific
parallel processing
license plate
resource manager
image processing
image retrieval
co occurrence
edge detection
hardware architecture
central processor