Login / Signup
A 6-bit 1-GS/s Two-Step SAR ADC in 40-nm CMOS.
Hung-Yen Tai
Cheng-Hsueh Tsai
Pao-Yang Tsai
Hung-Wei Chen
Hsin-Shu Chen
Published in:
IEEE Trans. Circuits Syst. II Express Briefs (2014)
Keyphrases
</>
analog to digital converter
low cost
random access memory
silicon on insulator
low power
synthetic aperture radar
nm technology
real time
post processing
power consumption
cmos technology
high speed
single chip
parameter estimation
image sensor
automatic target recognition