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An Efficient SRAM-Based Reconfigurable Architecture for Embedded Processors.
Sajjad Tamimi
Zahra Ebrahimi
Behnam Khaleghi
Hossein Asadi
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2019)
Keyphrases
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reconfigurable architecture
embedded processors
systolic array
single chip
power consumption
data flow
data transmission
motion estimation
low cost
multi view
low power
pseudorandom