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NPFONoC: A Low-loss, Non-blocking, Scalable Passive Optical Interconnect Network-on-Chip Architecture.
Junyong Deng
Haoyue Wu
Rui Shan
Yiwen Fu
Xinchuang Liu
Ping Wang
Published in:
APSIPA (2019)
Keyphrases
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network on chip
multi processor
power dissipation
routing algorithm
packet switched
interconnection networks
high speed
network simulator
power consumption
data transfer
program execution
single processor
shared memory
low power
real time
parallel architecture
cmos technology
multipath
shortest path