Efficient VLSI architecture for bit plane encoder of JPEG 2000.
Kishor SarawadekarSwapna BanerjeePublished in: ICIP (2009)
Keyphrases
- bit plane
- low complexity
- vlsi architecture
- rate distortion
- mode decision
- bit planes
- bit rate
- distributed video coding
- image coding
- transform domain
- motion estimation
- coding method
- rate control
- computational complexity
- probability model
- video compression
- video coding
- wavelet coefficients
- vlsi implementation
- low power
- wavelet domain
- spatial domain
- bitstream
- compression ratio
- dct domain
- image quality
- image processing