A 12-bit 3.4 MS/s Two-Step Cyclic Time-Domain ADC in 0.18-µm CMOS.

Liang-Jen Chen Shen-Iuan Liu

Published in: IEEE Trans. Very Large Scale Integr. Syst. (2016)

Keyphrases

analog to digital converter
random access memory
high speed
real time
low cost
post processing
frequency domain
single chip
database
control system
power consumption
low power