FPGA based convolution and memory architecture for Convolutional Neural Network.
K. A. ShahanJ. Sheeba RaniPublished in: VLSI Design (2020)
Keyphrases
- convolutional neural network
- hardware architecture
- hardware implementation
- hardware design
- real time
- processing elements
- memory usage
- associative memory
- hardware architectures
- memory management
- management system
- level parallelism
- memory hierarchy
- image processing
- main memory
- software architecture
- face detection
- computing power
- memory size
- convolution kernel
- parallel architecture
- limited memory
- design considerations
- application specific
- embedded systems
- memory requirements
- operating system
- feature selection