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Investigation of transient fault effects in synchronous and asynchronous Network on Chip router.
Pooria M. Yaghini
Ashkan Eghbal
Hossein Pedram
Hamid R. Zarandi
Published in:
J. Syst. Archit. (2011)
Keyphrases
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network on chip
routing algorithm
network simulator
multi processor
data transfer
interconnection networks
power dissipation
packet switched
program execution
mobile devices
wireless sensor networks
high speed
fault tolerant
multipath