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Evaluation of a median threshold based EEPROM-PUF concept implemented in a high temperature SOI CMOS technology.

Benjamin WillschMarius te HeesenJulia HauserStefan DreinerHolger KappertHolger Vogt
Published in: DTIS (2018)
Keyphrases
  • high temperature
  • cmos technology
  • low power
  • power consumption
  • low voltage
  • silicon on insulator
  • neural network
  • low cost
  • input output