A wire delay scalable stream processor architecture.
Guang XuHong AnMing CongFang WangYongqing RenPublished in: ACSAC (2008)
Keyphrases
- multi processor
- parallel architecture
- instruction set
- real time
- systolic array
- management system
- network architecture
- industry standard
- multi core processors
- single processor
- multiprocessor architecture
- parallel processing
- sliding window
- parallel architectures
- distributed memory
- memory access
- computer architecture
- floating point
- data flow
- differentiated services
- scalable distributed
- computation intensive
- peer to peer