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A 2.3-MW, 950-MHz, 8-Bit Fully-Time-Based Subranging ADC Using Highly-Linear Dynamic VTC.
Kenichi Ohhata
Published in:
VLSI Circuits (2018)
Keyphrases
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high speed
dynamic environments
integer arithmetic
neural network
genetic algorithm
information systems
case study
high frequency
closed form
transfer function
shift register