Precharged SRAM cell for ultra low-power on-chip cache.
Ramy E. AlyMagdy A. BayoumiPublished in: SoCC (2005)
Keyphrases
- ultra low power
- low power
- power consumption
- low cost
- high speed
- single chip
- random access memory
- query processing
- low power consumption
- cmos technology
- main memory
- prefetching
- image sensor
- digital signal processing
- memory access
- data access
- dynamic random access memory
- real time
- multithreading
- data transmission
- design considerations
- cache misses
- power reduction