Statistical Model Checking of Approximate Circuits: Challenges and Opportunities.
Josef StrnadelPublished in: DATE (2020)
Keyphrases
- model checking
- temporal logic
- asynchronous circuits
- symbolic model checking
- formal specification
- formal verification
- temporal properties
- automated verification
- finite state machines
- finite state
- partial order reduction
- process algebra
- model checker
- pspace complete
- bounded model checking
- computation tree logic
- reachability analysis
- timed automata
- verification method
- concurrent systems
- np hard
- epistemic logic
- reactive systems
- transition systems
- linear temporal logic
- formal methods
- artificial intelligence
- coalition logic
- abstract interpretation
- reinforcement learning
- multi agent
- state space
- modal logic