Hysteresis effect in floating-body partially-depleted SOI CMOS domino circuits.

Ruchir Puri Ching-Te Chuang

Published in: ISLPED (1999)

Keyphrases

high speed
analog vlsi
delay insensitive
circuit design
vlsi circuits
human body
cmos technology
chip design
low cost
low voltage
mixed signal
low power
floating gate
error diffusion
logic synthesis
random access memory
phase transition
neural network