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An FPGA-Integrated Time-to-Digital Converter Based on Two-Stage Pulse Shrinking.
Ryszard Szplet
Kamil Klepacki
Published in:
IEEE Trans. Instrum. Meas. (2010)
Keyphrases
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data conversion
real time
hardware implementation
high speed
single chip
digital curves
neural network
low cost
control algorithm
control method
field programmable gate array
real time image processing