Ryszard Szplet

Publication Activity (10 Years)

Years Active: 2000-2021
Publications (10 Years): 11

Top Topics

Progressive Transmission

Real Valued Functions

Top Venues

IEEE Trans. Instrum. Meas.

Publications

Pawel Kwiatkowski, Dominik Sondej, Ryszard Szplet
A brief review of wave union TDCs. EBCCSP (2021)
Pawel Kwiatkowski, Ryszard Szplet
Multisampling wave union time-to-digital converter. EBCCSP (2020)
Pawel Kwiatkowski, Ryszard Szplet
Efficient Implementation of Multiple Time Coding Lines-Based TDC in an FPGA Device. IEEE Trans. Instrum. Meas. 69 (10) (2020)
Ryszard Szplet, Rafal Szymanowski, Dominik Sondej
Measurement Uncertainty of Precise Interpolating Time Counters. IEEE Trans. Instrum. Meas. 68 (11) (2019)
Pawel Kwiatkowski, Ryszard Szplet
Time-to-Digital Converter with Pseudo-Segmented Delay Line. I2MTC (2019)
Ryszard Szplet, Slawomir Jarzynski
A 9 ps time interval digitizer based on pulse repetition and averaging. I2MTC (2019)
Pawel Kwiatkowski, Ryszard Szplet
Digital-to-time converter with pulse train generation capability. I2MTC (2018)
Ryszard Szplet, Pawel Kwiatkowski, Zbigniew Jachna, Krzysztof Rozyc
Four-channel, precise, time-event recorder in programmable device. EBCCSP (2017)
Ryszard Szplet, Pawel Kwiatkowski, Zbigniew Jachna, Krzysztof Rozyc
An Eight-Channel 4.5-ps Precision Timestamps-Based Time Interval Counter in FPGA Chip. IEEE Trans. Instrum. Meas. 65 (9) (2016)
Ryszard Szplet, Dominik Sondej, Grzegorz Grzeda
High-Precision Time Digitizer Based on Multiedge Coding in Independent Coding Lines. IEEE Trans. Instrum. Meas. 65 (8) (2016)
Pawel Kwiatkowski, Ryszard Szplet, Zbigniew Jachna, Krzysztof Rozyc
A time digitizer based on multiphase clock implemented in FPGA device. EBCCSP (2016)
Dominik Sondej, Ryszard Szplet
A comparison of methods for time-to-digital conversion based on independent coding lines and multi-edge coding. MIXDES (2015)
Ryszard Szplet, Dominik Sondej, Grzegorz Grzeda
Subpicosecond-resolution time-to-digital converter with multi-edge coding in independent coding lines. I2MTC (2014)
Dominik Sondej, Ryszard Szplet
A combination of multi-edge coding and independent coding lines for time-to-digital conversion. FPL (2014)
Ryszard Szplet, Kamil Klepacki
An FPGA-Integrated Time-to-Digital Converter Based on Two-Stage Pulse Shrinking. IEEE Trans. Instrum. Meas. 59 (6) (2010)
Ryszard Szplet, Józef Kalisz, Rafal Szymanowski
Interpolating time counter with 100 ps resolution on a single FPGA device. IEEE Trans. Instrum. Meas. 49 (4) (2000)