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Cache Timing Attacks from The SoCFPGA Coherency Port (Abstract Only).
Sumanta Chaudhuri
Published in:
FPGA (2017)
Keyphrases
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data access
countermeasures
high level
low level
main memory
prefetching
malicious attacks
watermarking scheme
chosen plaintext
caching scheme
attack detection
cache management
database
web caching
back end
higher level
malicious users
data mining