An Efficient 3-Bit -Scan Multiplier without Overlapping Bits, and Its 64x64 Bit Implementation.

Hak-soo Yu Jacob A. Abraham

Published in: VLSI Design (2002)

Keyphrases

bit parallel
error correcting codes
gray code
s box
significant bit
hardware implementation
bit string
real time
data sets
digital images
efficient implementation
block cipher
scan data
bit vector
random number generator
advanced encryption standard