Integrating HDL Synthesis and Partitioning for Multi-FPGA Designs.
Wen-Jong FangAllen C.-H. WuPublished in: IEEE Des. Test Comput. (1998)
Keyphrases
- hardware design
- high speed
- design space exploration
- hardware implementation
- low cost
- hardware architecture
- real time
- design principles
- parallel hardware
- functional programs
- digital signal
- real time image processing
- signal processing
- evolutionary algorithm
- case study
- information systems
- social networks
- neural network