Checker Design for On-line Testing of Xilinx FPGA Communication Protocols.

Martin Straka Jiri Tobola Zdenek Kotásek

Published in: DFT (2007)

Keyphrases

communication protocols
high speed
hardware architecture
hardware implementation
fpga device
real time
design process
fpga implementation
hardware description language
neural network
information systems
intelligent agents
field programmable gate array
communication protocol
verilog hdl