RF authenticated protection scheme for SRAM-based FPGA IP cores.
Laavanya SridharV. Lakshmi PrabhaPublished in: Int. J. Electron. Secur. Digit. Forensics (2012)
Keyphrases
- protection scheme
- power reduction
- power consumption
- low power
- dynamic random access memory
- hardware implementation
- high speed
- low cost
- field programmable gate array
- data transmission
- operating system
- embedded dram
- signal processing
- random access memory
- ip networks
- application layer
- information theoretic
- information systems
- video sequences