A Low-Power Time-to-Digital Converter for the CMS Endcap Timing Layer (ETL) Upgrade.
Wei ZhangHanhan SunChristopher EdwardsDatao GongXing HuangChonghan LiuTiankuan LiuTiehui LiuJamieson OlsenQuan SunXiangming SunJinyuan WuJingbo YeLi ZhangPublished in: CoRR (2020)
Keyphrases
- low power
- mixed signal
- low cost
- power consumption
- high speed
- analog to digital converter
- data conversion
- vlsi circuits
- high power
- single chip
- wireless transmission
- data warehouse
- low power consumption
- low voltage
- cmos technology
- vlsi architecture
- multi channel
- business intelligence
- logic circuits
- digital signal processing
- cmos image sensor
- power reduction
- image sensor
- application layer
- image processing