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Time stamp invalidation of TLB-unified cache and its performance evaluation.

Ken-ichi SuzukiNobuyuki ObaShigenori ShimizuHiroaki KobayashiTadao Nakamura
Published in: Systems and Computers in Japan (1999)
Keyphrases
  • cache misses
  • response time
  • cache invalidation
  • prefetching
  • main memory
  • hit rate
  • data access
  • cached data
  • data structure
  • data sets
  • access patterns
  • memory hierarchy
  • hit ratio
  • memory subsystem