A precision low-power mismatch-compensated sample-and-hold circuit for biomedical applications.
S. L. MahP. K. ChanShiv Kumar MishraPublished in: APCCAS (2010)
Keyphrases
- low power
- high speed
- logic circuits
- cmos technology
- power consumption
- power reduction
- low cost
- power dissipation
- gate array
- vlsi circuits
- delay insensitive
- digital signal processing
- high power
- single chip
- mixed signal
- wireless transmission
- low power consumption
- vlsi architecture
- nm technology
- digital circuits
- low voltage
- real time
- energy dissipation