A CMOS low-noise and low-power charge sampling integrated circuit for capacitive detector/sensor interfaces.
Suharli TedjaJan Van der SpeigelHugh H. WilliamsPublished in: IEEE J. Solid State Circuits (1995)
Keyphrases
- low power
- integrated circuit
- charge coupled device
- high speed
- image sensor
- wide dynamic range
- metal oxide semiconductor
- low power consumption
- power consumption
- low cost
- single chip
- cmos image sensor
- cmos technology
- photon counting
- vlsi circuits
- digital signal processing
- logic circuits
- real time
- mixed signal
- power reduction
- digital camera
- solid state
- gate array
- ultra low power
- energy dissipation
- hardware and software
- frame rate
- nm technology