Design of CMOS Memristor Emulator and Logic Gates For Neuromorphic Circuits.

K. Shabd Swaroop Gufran Ahmad

Published in: ISDCS (2023)

Keyphrases

logic circuits
chip design
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low power
logic synthesis
delay insensitive
floating gate
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digital circuits
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power dissipation
single chip
multi valued
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quantum mechanics
power consumption
analog vlsi
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