An FPGA Implementation of a Montgomery Multiplier Over GF(2^m).

Nele Mentens Siddika Berna Örs Bart Preneel Joos Vandewalle

Published in: Comput. Artif. Intell. (2004)

Keyphrases

fpga implementation
hardware implementation
signal processing
efficient implementation
image processing algorithms
field programmable gate array
hardware architecture
image processing
floating point