Design of 60 GHz low power & high data rate receiver for the next generation NFC systems.

Ki-Jin Kim Suk-Hui Lee Sanghoon Park K. H. Ahn

Published in: ICTC (2014)

Keyphrases

low power
high speed
power consumption
single chip
high data rate
low cost
low power consumption
vlsi architecture
power reduction
logic circuits
ultra low power
power dissipation
cmos technology
embedded systems
real time
digital circuits
mixed signal
code division multiple access
digital images