A configurable H.265-compatible motion estimation accelerator architecture for realtime 4K video encoding in 65 nm CMOS.
Michael BralyAaron StillmakerBevan M. BaasPublished in: DSC (2017)
Keyphrases
- video encoding
- motion estimation
- low complexity
- real time
- cmos technology
- nm technology
- motion vectors
- video encoder
- video coding
- high speed
- video compression
- optical flow
- video sequences
- motion compensation
- low bit rate
- low cost
- motion field
- low power
- reference frame
- motion compensated
- computer vision
- block matching
- inter frame
- image sequences
- computational power
- digital video
- spatial domain
- power consumption
- hardware implementation
- distributed video coding
- rate distortion
- computational complexity