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A 2.2-GHz 3.2-mW DTC-free Sampling ΔΣ Fractional-N PLL with -110 dBc/Hz In-band phase noise and -246dB FoM and -83dBc Reference Spur.

Jingcheng TaoChun-Huat Heng
Published in: VLSI Circuits (2019)
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