Optimized on-chip pipelining of memory-intensive computations on the cell BE.
Christoph W. KesslerJörg KellerPublished in: SIGARCH Comput. Archit. News (2008)
Keyphrases
- high speed
- memory subsystem
- memory requirements
- random access memory
- level parallelism
- memory access
- vlsi implementation
- low cost
- memory usage
- analog vlsi
- parallel processing
- high density
- memory space
- memory size
- computational power
- processor core
- programmable logic
- digital signal processors
- multithreading
- physical design
- main memory
- gene expression