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A 40-nm Sub-Threshold 5T SRAM Bit Cell With Improved Read and Write Stability.

Adam TemanAnatoli MordakhayJanna MezhibovskyAlexander Fish
Published in: IEEE Trans. Circuits Syst. II Express Briefs (2012)
Keyphrases
  • random access memory
  • read write
  • power consumption
  • stability analysis
  • database systems
  • improved algorithm
  • data sets