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Gate-level power and current simulation of CMOS integrated circuits.
Alessandro Bogliolo
Luca Benini
Giovanni De Micheli
Bruno Riccò
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (1997)
Keyphrases
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integrated circuit
power consumption
metal oxide semiconductor
reactive power compensation
low cost
cmos technology
low voltage
high speed
higher level
simulation model
image analysis
control system
embedded systems
printed circuit boards
built in self test