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Feedback-Based Low-Power Soft-Error-Tolerant Design for Dual-Modular Redundancy.
Yan Li
Yufeng Li
Jie Han
Jianhao Hu
Fan Yang
Xuan Zeng
Bruce F. Cockburn
Jie Chen
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2018)
Keyphrases
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low power
error tolerant
logic circuits
low cost
single chip
high speed
power consumption
low power consumption
vlsi architecture
gate array
cmos technology
digital signal processing
power dissipation
mixed signal
vlsi circuits
real time
ultra low power
graph matching
embedded systems
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