Monolithic 3D Semiconductor Footprint Scaling Exploration Based on VFET Standard Cell Layout Methodology, Design Flow, and EDA Platform.
Chung-Kuan ChengChia-Tung HoDaeyeal LeeBill LinPublished in: IEEE Access (2022)
Keyphrases
- design methodology
- neural network
- primary purpose
- platform independent
- design considerations
- design principles
- design process
- flow field
- knowledge based systems
- conceptual framework
- engineering design
- case study
- design tools
- web services
- genetic algorithm
- virtual laboratory
- microstrip
- simulation software
- flow patterns
- layout design
- data sets