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Implementation of a New Offset Generator Block for the Low-Voltage, Low-Power Self Biased Threshold Voltage Extractor Circuit.
Rituparna Dasgupta
Dipankar Saha
Jagannath Samanta
Sayan Chatterjee
Chandan Kumar Sarkar
Published in:
VDAT (2012)
Keyphrases
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cmos technology
low voltage
low power
power consumption
high speed
low cost
single chip
mixed signal
logic circuits
power dissipation
digital signal processing
low power consumption
vlsi circuits
parallel processing
image sensor
real time
energy efficiency
energy dissipation
signal processor
spatially varying