Low-power area-efficient high-speed I/O circuit techniques.
Ming-Ju Edward LeeWilliam J. DallyPatrick ChiangPublished in: IEEE J. Solid State Circuits (2000)
Keyphrases
- high speed
- low power
- logic circuits
- low cost
- power consumption
- single chip
- cmos technology
- low power consumption
- frame rate
- input output
- high power
- power reduction
- wireless transmission
- digital signal processing
- delay insensitive
- vlsi circuits
- gigabit ethernet
- wireless sensor networks
- gate array
- ultra low power
- vlsi architecture
- digital camera