Reconfigurable 100 Gb/s silicon photonic network-on-chip.
Po DongYoung-Kai ChenTingyi GuLawrence L. BuhlDavid T. NeilsonJeffrey H. SinskyPublished in: OFC (2014)
Keyphrases
- network on chip
- interconnection networks
- low cost
- high speed
- cmos technology
- routing algorithm
- low power
- network simulator
- multi processor
- power dissipation
- fault tolerant
- data transfer
- parallel algorithm
- multistage
- message passing
- parallel processing
- hardware implementation
- power consumption
- multipath
- single chip
- hardware and software
- general purpose
- routing protocol
- embedded systems
- efficient implementation